Regulation circuit associated with synchronous rectifier providing cable compensation for the power converter and method thereof

ABSTRACT

A regulation circuit of a power converter for cable compensation according to the present invention comprises a signal generator generating a compensation signal in accordance with a synchronous rectifying signal. An error amplifier has a reference signal for generating a feedback signal in accordance with an output voltage of the power converter. The compensation signal is coupled to program the reference signal. The feedback signal is coupled to generate a switching signal for regulating an output of the power converter. The regulation circuit of the present invention compensates the output voltage without a shunt resistor to sense the output current of the power converter for reducing power loss.

REFERENCE TO RELATED APPLICATION

This reference is being filed as a Continuation Application of patentapplication Ser. No. 13/551,705, filed 18 Jul. 2012, currently pending.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention is related to a regulation circuit, especially toa regulation circuit associated with a synchronous rectifier providingcable compensation for the power converter.

2. Description of the Related Art

FIG. 1 shows a prior art of a power converter. A PWM controller (PWM) 30generates a switching signal S_(PWM) to switch a transformer 10 having aprimary winding N_(P) and a secondary winding N_(S) via a powertransistor 20 in accordance with a feedback signal V_(FB) for regulatingthe output of the power converter. The primary winding N_(P) of thetransformer 10 is coupled to receive an input voltage V_(IN). Thefeedback signal V_(FB) is generated by an opto-coupler 60 in response tothe output voltage V_(O) of the power converter. The opto-coupler 60 iscontrolled by an error amplifier 50. The error amplifier 50 generates asignal V_(F) coupled to control the opto-coupler 60. The error amplifier50 includes a reference signal V_(R) supplied with a positive inputterminal of the error amplifier 50 for regulating the output voltageV_(O). The output voltage V_(O) is coupled to a negative input terminalof the error amplifier 50 via a voltage divider developed by resistors51 and 52. A capacitor 53 is coupled between the negative input terminalof the error amplifier 50 and an output terminal of the error amplifier50.

The secondary winding N_(S) is coupled to an output terminal of thepower converter to generate the output voltage V_(O). A rectifier 40 iscoupled to one terminal of the secondary winding N_(S). An outputcapacitor 45 is coupled to the other terminal of the secondary windingN_(S) and the output terminal of the power converter to generate theoutput voltage V_(O). A resister 62 is coupled from the capacitor 45 andthe rectifier 40 to the opto-coupler 60.

Generally, the output cable of the power converter has a voltage dropproportional to its output current. Sensing the output current to offsetthe voltage drop is an approach for the output cable compensation.However, it will generate a significant power loss while sensing theoutput current by using a shunt resistor. The present invention providesa method and apparatus to compensate the output voltage without the needof sensing the output current of the power converter by the shuntresistor.

BRIEF SUMMARY OF THE INVENTION

The object of the present invention is to provide a regulation circuitand a method with output cable compensation for the power converter. Theregulation circuit and method compensate the output voltage without ashunt resistor to sense the output current of the power converter forreducing power loss.

The regulation circuit with output cable compensation for the powerconverter according to the present invention comprises a signalgenerator and an error amplifier. The signal generator generates acompensation signal in accordance with a synchronous rectifying signal.The error amplifier has a reference signal for generating a feedbacksignal in accordance with an output voltage of the power converter. Thecompensation signal is coupled to program the reference signal. Thefeedback signal is coupled to generate a switching signal for regulatingan output of the power converter.

A method for the regulation circuit of the power converter according tothe present invention comprises receiving the synchronous rectifyingsignal for generating the compensation signal, compensating thereference signal of the error amplifier of the regulation circuit inaccordance with the compensation signal, and generating the feedbacksignal in accordance with the reference signal and the output voltage ofthe power converter. The feedback signal is coupled to generate theswitching signal for regulating the output of the power converter.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention can be more fully understood by reading the subsequentdetailed description and examples with references made to theaccompanying drawings, wherein:

FIG. 1 shows a circuit diagram of a conventional power converter.

FIG. 2 shows a circuit diagram of a preferred embodiment of a powerconverter in accordance with the present invention.

FIG. 3 shows a circuit diagram of a preferred embodiment of theregulation circuit in accordance with the present invention.

FIG. 4 shows a circuit diagram of a preferred embodiment of the signalgenerator in accordance with the present invention.

FIG. 5 shows the waveforms of the SR signal S_(SR) and the pulse signalsS₁ and S₂ of the pulse generator in accordance with the presentinvention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 2 is a circuit diagram of a preferred embodiment of the powerconverter having a regulation circuit 100 according to the presentinvention. The power converter comprises the transformer 10, the powertransistor 20, the PWM controller (PWM) 30, the opto-coupler 60, asynchronous rectifying (SR) controller 70, a power transistor 75, andthe regulation circuit (REG) 100. The power transistor 20 is coupledfrom the primary winding N_(P) of the transformer 10 to the ground forswitching the transformer 10. The PWM controller 30 generates theswitching signal S_(PWM) to switch the power transistor 20 in accordancewith the fee dback signal V_(FB) for regulating the output (outputvoltage V_(O) and/or the output current I_(O)) of the power converter.

The opto-coupler 60 is coupled to the secondary winding N_(S) of thetransformer 10 through the resistor 62. The opto-coupler 60 generatesthe feedback signal V_(FB) coupled to the PWM controller 30 in responseto the output voltage V_(O). The secondary winding N_(S) is coupled tothe output terminal of the power converter to generate the outputvoltage V_(O). The output capacitor 45 is coupled to the secondarywinding N_(S) and the output terminal of the power converter to generatethe output voltage V_(O). The output voltage V_(O) is outputted to theload through the output cable. The output current I_(O) of the powerconverter flows through the output cable.

The power converter has a synchronous rectifying circuit to improve thepower efficiency of the power converter. The synchronous rectifyingcircuit includes the synchronous rectifying controller 70 and the powertransistor 75 having a parasitic diode 76. The power transistor 75 isused for a synchronous rectifier to replace the rectifier 40 (shown inFIG. 1) for rectification. A drain terminal of the power transistor 75is coupled to the secondary winding N_(S), and a source terminal of thepower transistor 75 is coupled to the output terminal of the powerconverter. The parasitic diode 76 is coupled between the drain terminaland the source terminal of the power transistor 75. The synchronousrectifying controller 70 generates a synchronous rectifying signal (SRsignal) S_(SR) coupled to a gate terminal of the power transistor 75 tocontrol the on/off of the power transistor 75.

The detail operation of the synchronous rectifying circuit can be foundin the prior art of “Synchronous rectification circuit for powerconverters”, U.S. Pat. No. 7,440,298. Refer to equation (9) of thisprior art, it is,

$\begin{matrix}{T_{discharge} = {\frac{V_{S}}{V_{O}} \times T_{charge}}} & (1)\end{matrix}$

where the T_(charge) is equal to the on-time T_(ON) of the switchingsignal S_(PWM); T_(discharge) is the “turn on period” of the SR signalS_(SR). The V_(S) is the magnetized voltage that is correlated to theinput voltage V_(IN) of the power converter. Thus, the equation (1) canbe rewritten as equation (2),

$\begin{matrix}{T_{SSR} = {\frac{K \times V_{I\; N}}{V_{O}} \times T_{ON}}} & (2)\end{matrix}$

where K is a constant.

Refer to an output power P_(O) of the flyback power converter, it can beexpressed as,

$\begin{matrix}{P_{O} = {{V_{O} \times I_{O}} = \frac{V_{I\; N}^{2} \times T_{ON}^{2}}{2 \times L_{P} \times T}}} & (3)\end{matrix}$

where L_(P) is the inductance of the primary winding N_(P) of thetransformer 10; T is the switching period of the switching signalS_(PWM).

In accordance with the equations (2) and (3), if the output voltageV_(O) is fixed value, then the period T_(SSR) (“turn on period” of theSR signal S_(SR)) is correlated to the output current I_(O). In otherwords, the SR signal S_(SR) is correlated to the output current I_(O).Therefore, the SR signal S_(SR) can be used instead of the outputcurrent I_(O) to control the output voltage V_(O) for the cablecompensation.

The regulation circuit 100 is coupled to receive the SR signal S_(SR)and the signal V_(A) for generating the signal V_(F). The signal V_(F)is future coupled to drive the opto-coupler 60 and generate the feedbacksignal V_(FB). The signal V_(A) is produced in accordance with theoutput voltage V_(O) via the voltage divider developed by the resistors51 and 52. Therefore, the regulation circuit 100 is used for generatingthe feedback signal V_(FB) in accordance with the output voltage V_(O).The voltage drop of the output voltage V_(O) in the output cable can becompensated by the control of the SR signal S_(SR). Further, a resistor115 is coupled to a terminal R_(P) of the regulation circuit 100.

FIG. 3 is a circuit diagram of a preferred embodiment of the regulationcircuit 100 according to the present invention. A signal generator (S/I)200 is coupled to receive the SR signal S_(SR) for generating acompensation signal I_(COMP). The resistor 115 is coupled to theterminal R_(P) of the signal generator 200 to determine the ratio ofsignal generation. The resistor 115 is used for programming the level ofthe compensation signal I_(COMP) in accordance with the SR signalS_(SR). An output terminal of a buffer amplifier 110 having a referencevoltage V_(R1) supplied with a positive input terminal of the bufferamplifier 110 is coupled to a resistor 117. The resistor 117 is furthercoupled to an output terminal of the signal generator 200. A negativeinput terminal of the buffer amplifier 110 is coupled to the outputterminal of the buffer amplifier 110 and the resistor 117. Thecompensation signal I_(COMP) and the resistor 117 are utilized togenerate a compensation voltage at the resistor 117.

A resistor 165 and a capacitor 150 develop a filter coupled to theoutput terminal of the signal generator 200 and the resistor 117. Theresistor 165 is coupled from the output terminal of the signal generator200 and the resistor 117 to a terminal of the capacitor 150. The otherterminal of the capacitor 150 is coupled to the ground. Through thefilter, a reference signal V_(REF) is generated at the capacitor 150.

V _(REF) =V _(R1)+(I _(COMP) ×R ₁₁₇)  (4)

The capacitor 150 of the filter is used for filtering the referencesignal V_(REF). According to equation (4), the reference signal V_(REF)is correlated to the compensation signal I_(COMP). Therefore, thecompensation signal I_(COMP) can program and compensate the referencesignal V_(REF), and the reference signal V_(REF) is programmable inresponse to the output current I_(O) (as shown in FIG. 2) due to thecompensation signal I_(COMP) is correlated to the SR signal S_(SR) andthe SR signal S_(SR) is correlated to the output current I_(O). Further,according to equation (4), the reference signal V_(REF) is furthercorrelated to the reference voltage V_(R1) of the buffer amplifier 110.Therefore, the buffer amplifier 110 is coupled to the compensationsignal I_(COMP) for generating the reference signal V_(REF).

An error amplifier 170 is coupled to receive the reference signalV_(REF) and the signal V_(A) to generate the signal V_(F) for generatingthe feedback signal V_(FB) (as shown in FIG. 2). A positive inputterminal and a negative input terminal of the error amplifier 170receive the reference signal V_(REF) and the signal V_(A) respectively.An output terminal of the error amplifier 170 generates the signalV_(F). A capacitor 175 is coupled between the negative input terminal ofthe error amplifier 170 and the output terminal of the error amplifier170.

FIG. 4 is a circuit diagram of a preferred embodiment of the signalgenerator 200 according to the present invention. A pulse generator 210receives the SR signal S_(SR) and generates pulse signals S₁ and S₂ inresponse to the SR signal S_(SR). The waveforms of the pulse signals S₁and S₂ are shown in FIG. 5. The first pulse signal S₁ is enabled whenthe SR signal S_(SR) is disabled. Once the first pulse signal S₁ isdisabled, the second pulse signal S₂ is enabled after a delay time. TheSR signal S_(SR) is further coupled to control a charge circuit tocharge a capacitor 250 for providing a voltage. The voltage provided bythe capacitor 250 is correlated to the SR signal S_(SR). The chargecircuit includes a current source 230 and a charge switch 231. Thecurrent source 230 is coupled between a supply voltage V_(CC) and thecharge switch 231 to charge the capacitor 250 through the charge switch231. The capacitor 250 is coupled from the charge switch 231 to theground. The charge switch 231 is controlled by the SR signal S_(SR).

The first pulse signal S₁ is coupled to control a sample switch 232 forsampling the voltage of the capacitor 250 to a capacitor 270. The sampleswitch 232 is coupled between the capacitor 250 and the capacitor 270.The capacitor 270 is further coupled to the ground.

The second pulse signal S₂ is coupled to control a discharge switch 233for discharging the capacitor 250. The discharge switch 233 is coupledbetween the capacitor 250 and the ground. The voltage of the capacitor270 is correlated to the voltage of the capacitor 250. The capacitor 270is further coupled to a voltage to current converter to convert thevoltage of the capacitor 270 to a current I₃₁₀ for generating thecompensation signal I_(COMP). In other words, the voltage to currentconverter converts the voltage of the capacitor 250 to the current I₃₁₀for generating the compensation signal I_(COMP). The voltage to currentconverter includes an operational amplifier 300 and a transistor 310.The resistor 115 (at RP terminal) is coupled to the voltage to currentconverter.

The capacitor 270 is coupled to a positive input terminal of theoperational amplifier 300. A negative input terminal of the operationalamplifier 300 is coupled to a source terminal of the transistor 310 andthe resistor 115 through the RP terminal. The source terminal of thetransistor 310 is coupled to the resistor 115 through the RP terminal.The voltage to current converter converts the voltage of the capacitor270 to the current I₃₁₀ at a drain terminal of the transistor 310 inaccordance with the resistance of the resistor 115 (at RP terminal). Theresistor 115 is utilized to program the current I₃₁₀ in accordance withthe SR signal S_(SR) for programming the level of the compensationsignal I_(COMP).

A gate terminal of the transistor 310 is controlled by an outputterminal of the operational amplifier 300 for producing the currentI₃₁₀. The current I₃₁₀ is further coupled to a current mirror formed bytransistors 311 and 312. The current mirror generates the compensationsignal I_(COMP). Source terminals of the transistors 311 and 312 arecoupled to the supply voltage V_(CC). Gate terminals of the transistors311 and 312 and drain terminals of the transistors 310 and 311 arecoupled together. A drain terminal of the transistor 312 generates thecompensation signal I_(COMP).

Although the present invention and the advantages thereof have beendescribed in detail, it should be understood that various changes,substitutions, and alternations can be made therein without departingfrom the spirit and scope of the invention as defined by the appendedclaims. That is, the discussion included in this invention is intendedto serve as a basic description. It should be understood that thespecific discussion may not explicitly describe all embodimentspossible; many alternatives are implicit. The generic nature of theinvention may not fully explained and may not explicitly show that howeach feature or element can actually be representative of a broaderfunction or of a great variety of alternative or equivalent elements.Again, these are implicitly included in this disclosure. Neither thedescription nor the terminology is intended to limit the scope of theclaims.

What is claimed is:
 1. A regulation circuit of a power converter,comprising: an error amplifier having a reference signal for generatinga feedback signal in accordance with an output voltage of the powerconverter; and a synchronous rectifying controller generating asynchronous rectifying signal; wherein the feedback signal is coupled togenerate a switching signal for regulating the output voltage of thepower converter and a voltage drop on the output voltage is compensatedin response to the synchronous rectifying signal.
 2. The regulationcircuit as claimed in claim 1, wherein the reference signal isprogrammed in accordance with the synchronous rectifying signal.
 3. Theregulation circuit as claimed in claim 1, wherein the reference signalis programmed in accordance with a demagnetization time of a transformerof the power converter; the transformer comprising a primary winding anda secondary winding.
 4. The regulation circuit as claimed in claim 1,wherein the synchronous rectifying signal is utilized to control a powertransistor coupled to the power converter; the power transistor beingused for a synchronous rectifier.
 5. The regulation circuit as claimedin claim 1, wherein the synchronous rectifying signal is correlated toan output current of the power converter.
 6. A regulation circuit of apower converter, comprising: an error amplifier having a referencesignal for generating a feedback signal in accordance with an outputvoltage of the power converter, the feedback signal coupled to generatea switching signal for regulating the output voltage of the powerconverter; and a power transistor used for a synchronous rectifier andcoupled to a secondary side of the power converter; wherein a voltagedrop on the output voltage is compensated in response to a turn onperiod of the power transistor.
 7. The regulation circuit as claimed inclaim 6, wherein the reference signal is programmed in accordance withthe turn on period of the power transistor.
 8. The regulation circuit asclaimed in claim 6, wherein the reference signal is programmed inaccordance with a demagnetization time of a transformer of the powerconverter; the transformer comprising a primary winding and a secondarywinding.
 9. The regulation circuit as claimed in claim 6, wherein theturn on period of the power transistor is correlated to an outputcurrent of the power converter.
 10. A power converter, comprising: aregulation circuit generating a feedback signal in accordance with asynchronous rectifying signal and an output voltage of the powerconverter; wherein the feedback signal is coupled to generate aswitching signal for regulating the output voltage of the powerconverter and a voltage drop on the output voltage is compensated inresponse to the synchronous rectifying signal.
 11. The power converteras claimed in claim 10, wherein the synchronous rectifying signal isutilized to control a power transistor coupled to the power converter;the power transistor being used for a synchronous rectifier.
 12. Thepower converter as claimed in claim 10, wherein the regulation circuitgenerates the feedback signal in accordance with an on-time of thesynchronous rectifying signal and the output voltage of the powerconverter.
 13. The power converter as claimed in claim 10, wherein theregulation circuit has a reference signal for generating the feedbacksignal, and the reference signal is programmed in accordance with thesynchronous rectifying signal.
 14. The power converter as claimed inclaim 10, wherein the synchronous rectifying signal is correlated to anoutput current of the power converter.
 15. A power converter,comprising: a regulation circuit generating a feedback signal inaccordance with a turn on period of a power transistor and an outputvoltage of the power converter; wherein the feedback signal is coupledto generate a switching signal for regulating the output voltage of thepower converter; a voltage drop on the output voltage being compensatedin response to the turn on period of the power transistor; the powertransistor being used for a synchronous rectifier.
 16. The powerconverter as claimed in claim 15, wherein the turn on period of thepower transistor is correlated to an output current of the powerconverter.